| | SIPLUS S7-300 CPU 315-2DP -25 ... +70 DEGREES C WITH CONFORMAL COATING BASED ON 6ES7315-2AH14-0AB0 . CPU WITH MPI INTERFACE INTEGRATED 24 V DC POWER SUPPLY 256 KBYTE WORKING MEMORY 2. INTERFACE DP-MASTER/SLAVE MICRO MEMORY CARD NECESSARY |
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| General information |
| Hardware product version | 01 |
| Firmware version | V3.0 |
| Engineering with |
| Programming package | STEP 7 > V 5.4 + SP5 or STEP 7 as of V5.2 + SP1 with HSP 177 |
| Supply voltage |
| 24 V DC | Yes |
| permissible range, lower limit (DC) | 20.4 V |
| permissible range, upper limit (DC) | 28.8 V |
| External protection for supply cables (recommendation) | 2 A min. |
| Input current |
| Current consumption (rated value) | 850 mA |
| Current consumption (in no-load operation), typ. | 150 mA |
| Inrush current, typ. | 3.5 A |
| I²t | 1 A²·s |
| from supply voltage L+, max. | 900 mA |
| Power losses |
| Power loss, typ. | 4.5 W |
| Memory |
| Work memory |
| integrated | 256 kbyte |
| expandable | No |
| Size of retentive memory for retentive data blocks | 128 kbyte |
| Load memory |
| pluggable (MMC) | Yes |
| pluggable (MMC), max. | 8 Mbyte |
| Data management on MMC (after last programming), min. | 10 a |
| Backup |
| present | Yes; Guaranteed by MMC (maintenance-free) |
| without battery | Yes; Program and data |
| CPU processing times |
| for bit operations, min. | 0.05 µs |
| for word operations, min. | 0.09 µs |
| for fixed point arithmetic, min. | 0.12 µs |
| for floating point arithmetic, min. | 0.45 µs |
| CPU-blocks |
| Number of blocks (total) | 1024; (DBs, FCs, FBs); the maximum number of loadable blocks can be reduced by the MMC used. |
| DB |
| Number, max. | 1024; Number range: 1 to 16000 |
| Size, max. | 64 kbyte |
| FB |
| Number, max. | 1024; Number range: 0 to 7999 |
| Size, max. | 64 kbyte |
| FC |
| Number, max. | 1024; Number range: 0 to 7999 |
| Size, max. | 64 kbyte |
| OB |
| Description | see instruction list |
| Size, max. | 64 kbyte |
| Number of free cycle OBs | 1; OB 1 |
| Number of time alarm OBs | 1; OB 10 |
| Number of delay alarm OBs | 2; OB 20, 21 |
| Number of time interrupt OBs | 4; OB 32, 33, 34, 35 |
| Number of process alarm OBs | 1; OB 40 |
| Number of DPV1 alarm OBs | 3; OB 55, 56, 57 |
| Number isochronous mode OBs | 1; OB 61 |
| Number of startup OBs | 1; OB 100 |
| Number of asynchronous error OBs | 5; OB 80, 82, 85, 86, 87 |
| Number of synchronous error OBs | 2; OB 121, 122 |
| Nesting depth |
| per priority class | 16 |
| additional within an error OB | 4 |
| Counters, timers and their retentivity |
| S7 counter |
| Number | 256 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 255 |
| preset | Z 0 to Z 7 |
| Counting range |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 999 |
| IEC counter |
| present | Yes |
| Type | SFB |
| Number | Unlimited (limited only by RAM capacity) |
| S7 times |
| Number | 256 |
| Retentivity |
| adjustable | Yes |
| lower limit | 0 |
| upper limit | 255 |
| preset | No retentivity |
| Time range |
| lower limit | 10 ms |
| upper limit | 9990 s |
| IEC timer |
| present | Yes |
| Type | SFB |
| Number | Unlimited (limited only by RAM capacity) |
| Data areas and their retentivity |
| retentive data area, total | All, 128 KB max. |
| Flag |
| Number, max. | 2048 byte |
| Retentivity available | Yes; MB 0 to MB 2047 |
| Retentivity preset | MB 0 to MB 15 |
| Number of clock memories | 8; 1 memory byte |
| Data blocks |
| Number, max. | 1024; Number range: 1 to 16000 |
| Size, max. | 64 kbyte |
| Retentivity adjustable | Yes; via non-retain property on DB |
| Retentivity preset | Yes |
| Local data |
| per priority class, max. | 32 kbyte; Max. 2 KB per block |
| Address area |
| I/O address area |
| Inputs | 2048 byte |
| Outputs | 2048 byte |
| of which, distributed |
| Inputs | 2048 byte |
| Outputs | 2048 byte |
| Process image |
| Inputs | 2048 byte |
| Outputs | 2048 byte |
| Inputs, adjustable
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